To improve performance of cellphone hardware and software, and to attain our end goal of a single model that can be refined all the way to a hardware implemenation, we must begin by simulating measuring program performance and requirements in a well-understood simulation environment. Our baseline for this project is the TI OMAP 2420 which contains an ARM11 general purpose processor.

Several open source ARM simulators exist including:

However, for architectural studies we desire highly modular, easily instrumented model that fits into our particular framework. Eventually models should be cycle-accurate. We need a student to:

  1. integrate the emulator into our "SMASH" framework.
    • all memory interaction through a common shared interface
    • create a GPL wrapper around Skyeye that communicates with BSD-style-licensed SMASH to allow separate distribution
      • wrapper must allow Skyeye to be driven by an external package (e.g. with calls to clock())
      • wrapper must allow Skyeye devices to drive SMASH devices (either through simple memory-mapped devices or coprocessor interface)
      • communicate statistics (instruction and cycle count, memory traffic stats, from Skyeye to SMASH)
  2. add instructions and state to make simulator compatable with ARMv6 binaries

This work has been deemed of sufficient scope for an MEng thesis.

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A versatile software model of the ARMv6 ISA. (last edited 2006-02-28 17:46:17 by KenBarr)