Krste's notes from 2006-02-02 meeting:
SMASH vs RAMP vs Nokia-Arch
There was some confusion about what we mean by SMASH and how it relates to other projects.
SMASH is the simulation modeling and synthesis infrastructure, and is the framework within which we will do all of our development work.
SMASH is meant to be lightweight, and to support components developed at different levels of detail and in different languages. The unifying concept is the UTL model of computation, described in the attached short white paper (in progress). A UTL design is a network of "units" connected by "channels", which are buffered point-point FIFOs (no fan-in or fan-out). All behavior is in the units, and is described as a set of guarded atomic actions. I also use "transactors" as a name for units, as a contraction of "transactional actor".
UTL can describe an application or a target machine. In the Nokia project, we're very interested in blurring this boundary, so that pieces of an application description can be directly translated into target hardware.
The RAMP project (http://ramp.eecs.berkeley.edu/) is also using/contributing to SMASH. The RAMP team is developing many units that we might want to reuse within the Nokia project, including caches, DRAM controllers, on-chip network routers, and Linux virtual machine interfaces to device drivers.
Application versus Target versus Host
Applications are particular algorithms such as e.g., H.264, 802.11a. A use-case (Nokia-speak) or scenario, is one or more applications running together to provide some end-user experience. We are going to put applications into the XBS framework (TR attached).
A target is a particular hardware system we are modeling or synthesizing, or one that exists in the real world. E.g., a Nokia n80 phone, or smaller pieces, such as an OMAP chip, or even just a video accelerator core.
A host is a platform for running simulations or emulations of targets. Our initial software host is a single threaded Linux/x86 system. We will also support FPGA hosts for fast emulation, including Xilinx XUP boards and the BWRC BEE2 board. Future hosts might include multithreaded Linux/x86 systems (parallelized simulation), or some kind of OMAP board connected to an FPGA system.
Applications are mapped to targets, and targets are simulated/emulated on hosts.
RAMP Description Language
The RAMP Description Language (RDL) Compiler is the only large piece of working code in SMASH right now. RDL is a language to describe the units and channels of a UTL design, and how this design should be mapped to some underlying host platform for simulation. RDL does not describe the internals of a unit, but builds a shell around units written in a number of other languages including Verilog (working), Bluespec (planned), C/C++ (planned), Java (almost working).
RDL's first supported hosts are FPGA platforms (Xilinx XUP, and BWRC BEE2) with units written in Verilog. RDL automatically generates the Verilog to implement the communication channels and the wrappers around the units. The RDL Compiler (RDLC) is written in Java, with a modular architecture to support adding plug ins to support new host platform languages and hardware features. The first release came out last week (the BWRC server seems a bit flaky, so I don't know how easy it will be download, this should get fixed). I've attached a pdf of an article about RDL appearing at WARFP2006.
XBS
We've been developing XBS (eXtreme Benchmark Suite) to capture applications in a form that is easy to use , particularly for hardware versions of apps. A TR is attached.