Oct 2008 Monthly Highlights

Elliott, Alfred and Ramki were able to successfully bring up the FPGA board. TX/RX is now working. Elliott is still working to fix some gain control.
Gopal has modified the MAC and removed unnecessary req/res required by clause 9 of 802.11. MAC/PHY interface is much simpler now. Implemented ACK and appropriate timeouts (sifs,difs,acktimeout, etc.,). Also we have testbech with two STA's, which can be used for end-to-end testign. Backoff procedure is in place, but still needs some testing.
Integrated MAC and PHY.
Nirav and Myron have implemented the compiler to generated SW from Bluespec. They are now able to successfully generate H.264 SW. Also, they have partitioned the decoder components between HW and SW. We can now run simulations with some components in SW (C code) and others in HW (under Bluesim environmet).
Daniel is writing ICIP paper about higher level parallelism with several decoders. Also, he will be presenting his board and paper at Japan next week.